Yes, I’ve been here before… many, many times. I’m not sure how much time I’ve spent over the years designing and building computers. I’ve got, for example, a 6502 CPU based system modelled on the Acorn System 1. I’ve got several single board computers based on 6502’s Z80’s. 6809’s etc, multi-board computers, but the one thing I’ve never done is design and build a computer from the CPU up. I’ve designed and fiddled with some custom CPU emulations and even half built emulators for them, but there has always been something missing.

I said I’ve been here before and failed, so what’s changed?

There were several issues I think. One was the lack of time to do a project like this. Designing and building the hardware is time heavy on it’s own, but writing an assembler, maybe a language compiler, and operating system… that’s going to take a significant time investment, and until now, I’ve just not had that sort of time available. However, things change and I’ve now entered semi-retirement and this is as good a time as any to start.

Something that always bothered me was I couldn’t get past the idea of having to use an established CPU. I don’t want a system that’s going to break any computational speed records, I want a machine that is fun to work on, that I design and subsequently control every last bit and byte. So this means designing a custom CPU. More on this later.

Another thing that’s been a hurdle to this type of project for me has always been wanting to make sure that I can document it and other people could build it if they wanted. That meant making compromises with parts selection, using PCB’s instead of strip-board, making decisions that I thought would appeal to the majority rather than the minority… or only me.

And the final thing has been doing this alone. If my brother was still alive, this is the sort of project where he and I would have had great debates about address range, or should it have a HALT signal etc. I looked up to my brother and respected his opinion greatly, but alas I’ve always had to go-it-alone. However, with the introduction of AI’s like ChatGPT (whom I will call Chad), I can now get helpful and constructive input. He and I have spent a couple of sessions discussing how this system could work and hang together. The pros and cons of doing something a certain way, and it’s actually been a truly collaborate exercise. He’s shot down some of my ideas with well reasoned explanations, and he’s latched onto other ideas and helped me expand on them. It’s really helpful to have someone to talk with about these things; and yes, I’m anthropomorphising him now.

So I’ve come up with a set of project rules this time.

Firstly I will publish all the design documentation and software. However, I’m going to use whatever hardware I like, possibly including obsolete or hard to find parts. I have masses of parts in storage, and so I’m going to make use of them.

I’m going to prototype on breadboards, build on Euro Card size copper stripboard, and maybe move some designs to PCB’s if it’s beneficial to me or the project to do so. But one thing I need to do is manage costs, and iterative cycles of ordering PCB’s get’s expensive very quickly.

I’m going to mount the system in a 19″ rack. I have a rack with a generic backplane for my 6502 Acorn System replica, so I’m going to use that. That rack already has a suitable PSU that can easily supply my requirements and a 9-slot backplane.

It’s going to have features that I want. Some of them may be strange and people may not approve of, but that’s just the way it is. You are free to take as much or as little of the information from this project as you may find useful, and build your own system that’s as close to, or as far away from mine.

It will start off using a PIC to emulate my custom CPU. Once all the bugs are worked out, I will then look at moving it to an FPGA. The system will be able to support up to 4 CPUs of different technology if required. It will have a 16 bit data bus, and a 24-bit address bus and can address up to 16Mb of RAM and/or ROM and also address up to 16Mb of I/O space.

It will start off running a simple Monitor piece of firmware that will allow for programs to be entered in HEX. Then there will be some way of uploading the HEX directly from a PC that will be running an assembler.

I’ve attached a document that contains some of the architecture details. Chad and I worked on it for a couple of hours and I like where it’s heading. It’s nowhere near complete and doesn’t even start to look at how the CPU may work, but it’s a start.